Senior Package Modeling Engineer
Core
Conduct Finite Element Analysis (FEA) to assess stress, warpage, and thermo-mechanical behavior in advanced semiconductor packaging platforms.
Role type
Senior IC mechanical simulation engineer (semiconductor packaging)
Builds
Advanced semiconductor packages (flip-chip, 2.5D/3D IC, CoWoS-R, CoWoS-L)
Domain
Semiconductor manufacturing / Thermal-mechanical engineering
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Finite Element Analysis (FEA), thermal-mechanical interaction analysis, reliability failure mode analysis, material property analysis, semiconductor packaging architecture knowledge, JEDEC standards familiarity, simulation result interpretation
Preferred skills
Mentorship in modeling approaches, cross-functional collaboration, documentation of modeling methodologies
Technologies
ANSYS, Abaqus, COMSOL
Responsibilities
Conduct FEA to assess stress, warpage, and thermo-mechanical behavior; Evaluate new materials and interconnect concepts for packaging roadmaps; Analyze material properties and their impact on package reliability; Establish modeling approaches and interpret simulation results; Collaborate with cross-functional teams to ensure robust package builds; Document modeling methodologies and present findings
Seniority
Senior, hands-on IC
