ENGR PRIN, DESIGN LAYOUT; DSGN
Core
Lead physical layout implementation of complex analog and mixed-signal blocks including ADCs, PLLs, Bandgaps, References, LDOs, Bias circuits, and image sensor-related analog IPs.
Role type
Principal Analog Layout Engineer
Builds
Complex analog and mixed-signal integrated circuits for image sensors
Domain
Semiconductor / Analog IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog layout design, Mixed-signal layout design, Floorplanning, DRC/LVS/ERC/EM/IR verification, Tapeout quality checks, Circuit design collaboration, Risk identification, Mentorship, Layout automation, Device matching, Common-centroid techniques, Symmetry and critical routing, Shielding and noise isolation, Power planning, Substrate management, ESD and reliability considerations, Debugging, Problem-solving
Preferred skills
Cadence Virtuoso expertise, Physical verification flow expertise
Technologies
Cadence Virtuoso
Responsibilities
Lead physical layout implementation of complex analog and mixed-signal blocks, Independently own block-level layout activities from floorplanning through verification and final signoff, Drive layout architecture discussions and optimization strategies, Ensure high-quality execution through various tapeout quality checks, Collaborate with circuit designers to optimize performance and schedule, Identify layout-related risks and propose mitigation plans, Mentor junior layout engineers and provide technical guidance, Contribute to layout automation and reusable methodologies, Participate in design reviews and support project execution across product generations
Seniority
Principal, hands-on IC with mentorship responsibilities
