Staff Engineer-Mask Design (Analog Layout)
Core
Staff Analog Layout Design Engineer responsible for block-level to full-chip layout of power management ICs (Controllers, Drivers, DC-DC converters) for AI and automotive applications.
Role type
Staff IC Analog Layout Engineer (Power)
Builds
Power management ICs (Controllers, Drivers, DC-DC converters) for AI and automotive markets
Domain
Semiconductor / Analog Power IC Design
Deliverable
production ML models | product features
Required skills
Analog layout design (block to full chip), Floor planning, Analog layout matching, EM and reliability design, Die-level digital/analog/PowerFET/ESD/I/O/PAD integration, Die-to-bump connectivity, Package substrate interactions, DRC/LVS/PEX flows, Mentoring engineers
Preferred skills
BCD node IC layout, Package/substrate design (Flip chip, BGA, wire bond), Scripting (Python, Perl, TCL), Advanced IC CAD tools
Technologies
Virtuoso XL, Calibre DRC, LVS, PEX, PVS, EM, IR, R3D
Responsibilities
Drive design innovation and best practices for analog circuits, Manage a small group of engineers, Collaborate with circuit designers to minimize rework, Follow methodology guidelines for IP portability
Seniority
Staff, hands-on IC with mentorship