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Package Development Engineer

San Jose, CA, United States💼 Full-time💰 $150,000–$150,000🗓 2026-09-09 → 2026-09-26

Core

Lead the development and qualification of advanced multi-Phase Power Module, DrMOS, and Smart Power Stage (SPS) packages from concept through production release.

Role type

Senior IC package development engineer

Builds

High-performance, cost-effective power packaging solutions

Domain

Semiconductor power electronics

Deliverable

production ML models | product features

Required skills

Multi-Phase Power Module packaging, DrMOS packaging, SPS packaging, Advanced substrate design, Flip-chip assembly, Passive component integration, Thermal management, Reliability engineering, High-volume manufacturing, NPI processes

Preferred skills

OSAT collaboration, Substrate supplier management, Material vendor management

Technologies

ACAD, 8D, SPC, DFMEA, DOE, JEDEC standards, IPC standards

Responsibilities

Define package architecture, materials selection, and assembly process flow; Develop and optimize substrate designs including stack-up, routing, power planes, via structures, and thermal features; Drive flip-chip integration, bump design, underfill selection, and assembly process optimization; Develop passive component integration strategies for capacitors, resistors, and magnetic components; Perform electrical, thermal, and mechanical performance optimization; Lead package qualification and reliability testing; Conduct root cause analysis and implement corrective actions for package failures; Collaborate with OSATs and suppliers on DFM, process development, yield improvement, and cost reduction; Support NPI execution and transfer technologies into high-volume manufacturing.

Seniority

Senior, hands-on IC

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