Memory Package Integration Architect
Core
Define next-generation package pathfinding and system architectures for memory systems from datacenter to edge-AI, optimizing for speed, bandwidth, power, capacity, and thermal performance.
Role type
Senior IC memory package integration architect
Builds
Scalable next-generation memory packaging solutions for datacenter and edge-AI platforms
Domain
Semiconductor memory systems and advanced packaging
Deliverable
production ML models
Required skills
Memory system architecture, package design, signaling and IO design, PDN design, multi-physics simulation, EDA tool usage, AI/LLM application for engineering
Preferred skills
Signal and power integrity analysis, mechanical and reliability analysis, thermal analysis, industry standards influence
Technologies
Cadence, Siemens, Ansys
Responsibilities
Lead cross-stack co-optimization across silicon, package, board, and system; Drive long-term memory technology packaging strategy; Interface between package process technology, materials, electrical, thermo-mechanical, and system performance areas; Develop AI-based multi-physics solutions for efficiency gains
Seniority
Senior, hands-on IC
