Package Design Engineer
Core
IC package-design engineer for complex flip-chip-BGA packages enabling high-speed SerDes and very-high-power delivery for AI, networking, HPC, and 5G base stations.
Role type
IC package-design engineer (flip-chip-BGA)
Builds
High-performance package structures for ASICs
Domain
Semiconductor packaging / High-speed digital & RF
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
flip-chip-BGA package design, high-speed SerDes design, electrical engineering fundamentals, project management, physical design (layout)
Preferred skills
package-level signal integrity, package-level power integrity, Cadence APD (Allegro), design-automation coding (Cadence SKILL)
Technologies
Cadence APD, Cadence SKILL, Allegro
Responsibilities
Overall design responsibility for ASIC package designs covering signal integrity, power integrity, manufacturability, reliability, and thermal; Package Design of critical structures for SerDes, ADC/DAC, DDR; Schedule, prioritize, & track work across 2+ projects simultaneously; General flip-chip BGA package design & engineering; Project management and customer interface for design projects; Contribute to efficiency improvements through process development, automation, and documentation; Physical design (layout)
Seniority
Mid-level, hands-on IC
