Senior Mixed-Signal Physical Design Engineer - Cork, Ireland
Core
Leading and hands-on Analog Mixed-Signal Physical Design projects for next-generation SerDes, Sensors, and DDR IP in 3nm technologies and below for Snapdragon SoCs.
Role type
Senior IC mixed-signal physical design engineer
Builds
Mixed-signal IP blocks for Snapdragon System-on-Chip solutions
Domain
Semiconductor / ASIC Design / Mobile SoC
Required skills
Physical design implementation (Placement, CTS, STA), Complex PHY design, Custom physical design, Logic structure analysis, STA tool and timing closure, Power grid analysis, Clock tree synthesis, Low-power implementation, Physical Verification (DRC/LVS), Programming and scripting (Tcl, perl, C)
Preferred skills
Automation, Debugging, EDA tools, Leading global projects
Technologies
3nm, Snapdragon SoC, SerDes, DDR, Tcl, Perl, C
Responsibilities
Perform placement, CTS, and STA for mixed-signal designs; Execute custom physical design and pre-routing; Conduct power grid analysis and low-power implementation; Perform physical verification (DRC/LVS); Develop automation scripts; Lead projects across global sites
Seniority
Senior, hands-on IC
