CareerPlan

2027 PhD Analog/Mixed-Signal SerDes Design Intern/Co-op

San Jose, California; Santa Clara, CaliforniaInternship2026-09-11 → 2026-10-22
On-siteNo visa sponsorship

Core

Design high-speed analog and mixed-signal circuit architectures for electrical and optical interconnects in advanced FinFET technologies.

Role type

PhD Analog/Mixed-Signal SerDes Design Intern

Builds

High-bandwidth electrical and optical links, silicon-photonics transceivers

Domain

Semiconductors / High-Speed Communication / Silicon Photonics

Required skills

Analog/Mixed-Signal circuit design, SerDes architectures, CMOS design in advanced nodes, Link-level simulation (MATLAB/SPICE), RF passive component modeling, ADC/DAC design, PLL design, Clock distribution

Preferred skills

Wireline/optical transceiver building block design

Technologies

MATLAB, SPICE, FinFET, CMOS

Responsibilities

Define circuit architectures for high-bandwidth links, Perform link-level simulations, Design on-die RF passive components, Implement circuit building blocks (DACs, ADCs, PLLs, etc.), Gain exposure to silicon-photonics transceivers