Hardware Verification
1,136 open positions
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EDA & CAD Manager LumilensSan Jose 1mo Build and manage a robust EDA and CAD design environment supporting multiple IC design disciplines (analog, mixed-signal, digital) to enable faster, reliable silicon development.
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Digital Design Engineering Intern Texas InstrumentsOSLO, Norway 1mo Summer internship for students to gain hands-on experience in digital design engineering at Texas Instruments.
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Technology Architecture Engineering Intern (Summer 2027) GlobalFoundriesUSA - New York - Malta 1mo Conduct reverse engineering analyses and structural investigations of semiconductor technologies to strengthen technology competitiveness.
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Design Verification Infrastructure & Performance Engineer Advanced Micro Devices, IncIasi, Romania 1mo Optimize simulation and build flows for AMD silicon development by improving runtime, memory usage, and verification productivity.
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Software Engineer — AI-Native CAD Integrations QuilterUSA 1mo Build AI-native integrations between Quilter's PCB design platform and leading CAD tools (Altium, Cadence, Siemens) by parsing, translating, and generating complex, often undocumented binary and text-based file formats.
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Senior/Staff NAND Design Rule Engineer MicronHyderabad, Telangana, India 1mo Define physical design rules for next-generation 3D NAND development from conception to production ramp, ensuring accuracy and feasibility across layout and architecture options.
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Associate Engineer, Failure Analysis Engineering AnalogdevicesPhilippines, Cavite, GTC 1mo Develop software and applications to support semiconductor failure analysis, ensuring cycle time and quality commitments while collaborating with cross-functional engineering teams.
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Gate-level IR/EM CAD/NLP Engineer AppleAustin, United States of America 1mo Developing an analytic platform to identify and recommend solutions for signoff IR/EM analysis using machine learning and large language models.
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Software Engineer II: Hardware Verification Compiler CadenceBELO HORIZONTE, BR 1mo Develop high-performance compiler capabilities for large-scale model checking and structural checking within the Palladium emulation system.
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STAGE – Génération de netlists SPICE multi-simulateur – F/H STMicroelectronicsCrolles, France 1mo Develop a simulator-independent abstraction layer for SPICE netlist generation and measurement extraction to improve IP validation flow portability and reusability.
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Agentic AI Architect BroadcomUSA-TX-Austin - River Place B7 $129k1mo Design, deploy, and optimize autonomous multi-agent AI architectures to revolutionize IP block development and support workflows across complex semiconductor design phases.
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[2027 Campus Hire] Memory Design Automation – Memory Compiler↗ MediaTek 1mo Design and deliver high-quality design kits for cutting-edge technology node SRAM compilers.
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Engineer, Electrical Engineering AsmSingapore (ASM Front-End Mfg (S) Ltd) 1mo Technical lead for electrical systems within advanced semiconductor equipment, driving system-level design, integration, and validation for products enabling 5G, AI, and autonomous driving.
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Mechanical (Finite Element) Simulation Engineer HpeAguadilla, Puerto Rico, Puerto Rico 1mo Develop and apply advanced modeling and simulation techniques to support the design, development, validation, reliability, and optimization of mechanical, thermal, electronic, and system-level products.
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Principal Tape Out Engineer NxpSingapore 1mo Final checkpoint role ensuring semiconductor design data meets manufacturing requirements and quality standards before fabrication.
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Senior EDA Software Engineer QualcommSingapore, Central Singapore, Singapore 1mo Design, develop, and implement software solutions for R&D EDA software systems for Power Devices (PD), focusing on RF front-end module design and RF lab equipment test.
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Head of Formal Verification (m/f/d) LUBIS EDA GmbHHybrid / Kaiserslautern 1mo Own the direction of the formal verification consulting business, including roadmap, customer strategy, organization structure, and talent development.
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Physical Design Application Engineer proteanTecsSeoul, KR 1mo Support customers with physical design implementation and signoff flows for advanced process chips.
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Senior Technical Program Manager – Silicon Co-Design NVIDIAUS, CA, Santa Clara $200k1mo Senior Technical Program Manager leading System-on-Chip (SoC) programs from architecture through tape-out, bring-up, and productization, driving alignment across silicon, systems, and software.
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Software Engineer Intern↗ Marvell TechnologyMadrid, Community of Madrid, Spain €23k–€33k1mo Develop functional models to simulate System-on-Chip (SoC) architectures and write embedded software to test and validate these models.
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ECAD Principal Engineer ArmChandler, Arizona $250k1mo Design and develop automation tools to support package designs for next-generation SoCs in IoT, Automotive, and Compute spaces.
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