PMU Analog Layout Designer
Core
Deliver clean PMU analog layouts in deep SubMicron CMOS technologies, ensuring robust performance, area, and power requirements for Apple's high-performance analog IPs.
Role type
Analog Layout Engineer (PMU)
Builds
Complex analog layouts and chip levels for high-performance analog IPs
Domain
Semiconductor / Analog IC Design
Required skills
Deep SubMicron CMOS layout, LVS/DRC/ERC verification, CAD tools (Cadence/Mentor), analog/mixed-signal design principles, floor planning, hierarchical layout assembly, DFM practices, scripting (Perl/SKILL)
Preferred skills
PMU and chip-level layout experience, tight matching/low capacitance/low power block design, high voltage devices/ESD structures, IR drop/RC delay/electro-migration analysis, Master's degree
Technologies
Cadence, Mentor Graphics, Calibre, Perl, SKILL
Responsibilities
Plan and schedule layout work with circuit design teams, negotiate layout trade-offs, run design verification tools, interpret LVS/DRC/ERC reports, deliver layouts meeting engineering specifications
Seniority
Mid-level (3+ years experience)
