Senior Analog Engineer
Core
Architect, design, and verify CMOS analog blocks (Rx, Tx, PLL, DDR I/O) for custom ASICs to meet performance, area, power, and timeline constraints.
Role type
Senior IC analog engineer (mixed-signal, high-speed I/O)
Builds
Custom ASICs with high-precision analog circuits for Automotive, Industrial, Infrastructure, and IoT applications
Domain
Semiconductor / Analog IC Design
Required skills
CMOS analog circuit design, high-speed DDR I/O interface design, analog design tools (Cadence Virtuoso, Maestro, Spectre, HSPICE), signal integrity analysis, mixed-signal circuit design, low-power circuit design, EM/IR/Aging reliability analysis, analog layout design
Preferred skills
Experience with CTLE, VGA, DFE, slicer design, driver design, impedance calibration, ESD design
Technologies
Cadence Virtuoso, Maestro, Spectre, HSPICE, fine-geometry process
Responsibilities
Design and validate advanced analog circuits including DDR I/O interfaces, Rx/Tx circuits, PLLs, and bandgap references; Optimize high-speed DDR I/O interfaces for signal integrity and noise immunity; Conduct comprehensive simulations and testing to verify design performance and reliability; Create detailed design documentation including specifications, schematics, and design reports; Collaborate with digital design engineers and systems engineers for seamless integration; Ensure designs meet EM/IR/Aging requirements and high analog layout standards
Seniority
Senior, hands-on IC
