Staff Physical Design Engineer
Core
Implement ASIC physical design flow for digital islands within analog chips, focusing on floorplanning, placement, clock tree synthesis, routing, and power integrity analysis.
Role type
Staff Physical Design Engineer (ASIC/Mixed-Signal)
Builds
Digital island implementations embedded in analog chips
Domain
Semiconductor / Analog Backend / ASIC Physical Design
Required skills
ASIC physical design flow, floorplanning, placement optimization, clock tree synthesis (CTS), routing, physical verification, power integrity analysis (IR drop, electromigration)
Preferred skills
Analog layout experience
Technologies
EDA tools for physical design (implied by flow steps)
Responsibilities
Implement floorplanning, placement, CTS, routing, and sign-off checks; Optimize designs for performance, reliability, and manufacturability; Perform chip-level power integrity analysis across multiple voltage domains; Collaborate with global cross-functional teams including analog designers and verification engineers
