HBM Design Architect
Core
Lead technical enablement of novel memories and integration technologies (DRAM, gain-cell, stacked DRAM, hybrid bonding) for AI accelerators, HPC, and data centers.
Role type
Senior IC HBM Design Architect
Builds
Next-generation memory technologies and product architectures
Domain
Semiconductor / Memory / AI Hardware
Deliverable
production ML models
Required skills
DRAM/HBM product architecture, device physics, semiconductor process technology, system-technology co-optimization, roadmap planning
Preferred skills
PhD, vertically coordinated DRAM technologies, gain-cell structures, hybrid bonding, TSV-based 3D integration
Technologies
DRAM, HBM, hybrid bonding, TSV, CMOS-under-array
Responsibilities
Lead architecture and feasibility assessments for emerging memories and advanced integration; Translate device/process characteristics into product-level requirements; Identify technology–product gaps and drive de-risking plans; Partner with process, device, packaging, and design teams; Lead system-technology co-optimization studies; Develop roadmap proposals and present to technical leadership.
