Staff Mask Design Engineer
Core
Staff Analog Layout Design Engineer responsible for floorplanning and layout of analog circuits (charge pumps, comparators, amplifiers, bandgaps, linear regulators) from block level to full chip, ensuring EM and reliability for power products.
Role type
Staff Analog Layout Design Engineer
Builds
Analog power ICs (Controllers, Drivers, DC-DC converters) for AI and automotive applications
Domain
Semiconductor / Analog Power IC Design
Required skills
Analog layout design, floor planning, analog layout matching, EM design, reliability design, die-level digital/analog/PowerFET/ESD/I/O/PAD integration, die-to-bump connectivity, package substrate interactions, mentoring engineers
Preferred skills
BCD node IC layout, package/substrate design (Flip chip, BGA, wire bond), scripting (Python, Perl, TCL), advanced IC CAD tools (Virtuoso XL, Calibre DRC/LVS/PEX/PVS/EM/IR/R3D)
Technologies
Virtuoso XL, Calibre DRC, Calibre LVS, Calibre PEX, Calibre PVS, Calibre EM, Calibre IR, Calibre R3D
Responsibilities
Drive design innovation and best practices in analog layout, work independently to take ownership of committed schedules, manage a small group of engineers and mentor new graduates, collaborate with circuit and layout teams to minimize rework, follow methodology guidelines for IP portability
Seniority
Staff, hands-on IC design with mentoring responsibilities