精密制造技术工艺工程师（光电）
Core
Design and develop high-density multi-channel coupling processes between Arrayed Waveguide Gratings (FAU) and Silicon Photonics (PIC) chips for optical interconnects.
Role type
Senior IC process engineer (optical interconnects)
Builds
FAU-to-PIC coupling solutions and optical engine integration for advanced packaging
Domain
Semiconductor manufacturing / Optical photonics / Advanced packaging
Required skills
FAU design and selection, high-density multi-channel coupling, 2.5D/3D advanced packaging, optical theory (geometric optics, Gaussian beams, fiber coupling, mode matching), packaging processes (die attach, coupling, dispensing, wire bonding), lens beam expansion, grating coupling, alignment tolerance control, insertion loss and return loss management, yield and reliability testing
Preferred skills
2.5D/3D optical engine development, optical simulation tools (ZEMAX, Lumerical, COMSOL)
Technologies
ZEMAX, Lumerical, COMSOL
Responsibilities
Design and select FAU solutions, develop coupling processes between FAU and PIC chips, collaborate on optical interconnect and system integration, track industry trends and supply chains for equipment and components
Seniority
Senior, hands-on IC