Layout/Mask Designer
Core
Create physical layouts of transistors, resistors, and capacitors for analog circuits used in memory products, including floor planning, routing, and power bus designs.
Role type
IC Layout/Mask Designer
Builds
Memory products (DRAM)
Domain
Semiconductor / Analog IC Design
Required skills
DRAM circuit functions, IC custom layout for IP design, Cadence OA, Caliber verification tools, Design rule check (DRC), Layout vs Schematic (LVS), Making layout patterns, Industrial application of devices and sensors
Technologies
Cadence OA, Caliber
Responsibilities
Create physical layout of transistors, resistors, and capacitors for analog circuits; Build layouts that meet process rules and verify schematic match; Perform floor planning, routing, and power bus designs; Perform layout verification such as LVS/DRC/DFM; Communicate with engineering teams in India, Japan, and US.
