Digital Circuit Design Engineer - DRAM Design
Core
Design and optimize RTL for DRAM-related digital circuits and block-level designs, performing static timing analysis (STA) and drive timing closure.
Role type
Senior IC digital circuit design engineer (DRAM)
Builds
DRAM products
Domain
Semiconductor / Memory / Digital Circuit Design
Required skills
RTL design, Static Timing Analysis (STA), timing closure, power delivery network design, UNIX, Cadence environments
Preferred skills
Synthesis tools, IC compilers, circuit verification, layout verification, parasitic extraction
Technologies
Cadence, UNIX
Responsibilities
Design and optimize RTL for DRAM-related digital circuits and block-level designs; Perform STA and drive timing closure across critical paths; Collaborate with verification, product engineering, test, and process teams; Support circuit verification, layout checks, and parasitic extraction analysis.
Seniority
Senior, hands-on IC
