Staff Power Integrity Engineer
Core
Define modelling strategies, optimise decoupling, and analyse PDN impedance, voltage droop, transient response, and regulator interactions for high-performance AI compute systems.
Role type
Staff Power Integrity Engineer
Builds
High-performance AI compute systems (silicon, package, PCB, voltage regulation)
Domain
Hardware engineering / Power delivery / AI compute infrastructure
Deliverable
production ML models
Required skills
Power integrity analysis, PDN impedance modelling, transient response analysis, voltage droop analysis, regulator interaction analysis, electromagnetic modelling, circuit simulation, model extraction, engineering judgement, technical leadership, cross-disciplinary alignment
Preferred skills
None stated
Technologies
None explicitly listed (implied: simulation tools, modelling frameworks)
Responsibilities
Define modelling strategies for power-delivery architecture; optimise decoupling and analyse PDN impedance, voltage droop, transient response, and regulator interactions; lead resolution of complex power-integrity issues; create alignment across silicon, package, board, power, systems, and validation teams; develop reusable methods and mentor engineers.
Seniority
Staff, technical leadership & mentorship
