Senior PCB Layout Engineer
Core
Design complex, high-performance PCB layouts for Arm's custom SoC and reference design hardware platforms used for software validation and evaluation.
Role type
Senior IC PCB Layout Engineer
Builds
Physical hardware development platforms and reference designs for Arm silicon products
Domain
Semiconductor hardware design / Embedded compute
Required skills
Impedance controlled multi-layer PCB design, HDI PCB design, High-speed interface routing (PCIe, DDR), Differential pair routing, Power distribution network (PDN) design, Signal Integrity analysis, Power Integrity analysis, EDA tools (Cadence OrCAD CIS, Allegro), IPC standards knowledge, Stackup topology design, Escape routing for high-density SoCs/FPGAs
Preferred skills
Certified Interconnect Designer (CID/CID+), Schematic entry, Design automation (capacitor optimization, placement optimization)
Technologies
Cadence OrCAD CIS, Cadence Allegro PCB
Responsibilities
Collaborate with hardware design teams to develop complex designs from footprint creation to final routing, Finalize designs to deliver data packs (ODB++, Gerber, BOMs), Advise on pinout and routing topologies of high-density SoCs, Collaborate with PCB fabricators and CEMs for DFM/DFT
Seniority
Senior, hands-on IC