Senior Staff Product Application Engineer-Memory Subsystems
Core
Senior technical expert driving customer success for memory subsystems (DDR/LPDDR) across AMD's silicon portfolio, handling escalated failures from design-in to production and influencing next-gen architecture.
Role type
Senior Staff Product Application Engineer (Memory Subsystems)
Builds
DDR and LPDDR memory controllers, Network-on-Chip interfaces, and physical interfaces for AMD silicon.
Domain
Semiconductor / Memory Technology / Hardware Debug
Required skills
Memory subsystem expertise (DDR4/5, LPDDR4/5/6), JEDEC specifications, System architecture, Hardware debug, Technical writing, C programming, Signal/Power integrity analysis, PCB layout knowledge, Root cause analysis, Cross-functional leadership
Preferred skills
HBM experience, On-chip interconnect architecture, AI/LLM/ML tool usage, Verilog/SystemVerilog RTL reading, Oscilloscope and protocol analyzer proficiency
Technologies
DDR, LPDDR, JEDEC, Network-on-Chip, C, SystemVerilog, Verilog, IBIS, IBIS-AMI, JTAG, Oscilloscopes, BERTs, Logic analyzers
Responsibilities
Root-cause escalated memory failures (intermittent errors, calibration, margin issues) across DRAM, board, controller, and silicon; Author customer-facing memory documentation (datasheets, guides, tutorials); Review next-gen memory and NoC architecture for design gaps and RAS validation; Perform DRAM SI/PI measurements and timing analysis; Develop C-based memory test tooling and experiments; Influence product roadmap and feature scope based on system-level challenges.
Seniority
Senior Staff, hands-on IC with strategic customer interaction
