Staff DRAM Design Engineer
Core
Lead design and optimization of DRAM circuits including memory array, control logic, datapath, and test logic to shape memory architectures and circuit innovations.
Role type
Staff DRAM Design Engineer (hands-on IC)
Builds
Advanced memory designs and silicon-to-systems solutions
Domain
Semiconductor / Memory / DRAM
Deliverable
production ML models | product features
Required skills
Analog and digital circuit design, Circuit simulation (SPICE, Verilog), CMOS behavior, Timing analysis, Power optimization, Layout parasitics integration, Test chip development, Silicon bring-up
Preferred skills
DRAM array design, Sense amplifier design, DFT/DFM concepts, Advanced process nodes, AI tools in engineering workflows
Technologies
SPICE, Verilog
Responsibilities
Lead design and optimization of DRAM circuits; Perform and analyze circuit simulations; Evaluate architectural trade-offs impacting power, performance, and die size; Integrate layout parasitics into simulations; Define validation strategies including test chip development and silicon bring-up
Seniority
Staff, hands-on IC