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Software Engineering
› Hardware Verification
Hardware Verification
799 open positions
Frontend Central Product Integration Engineering (CPIE) Engineer/ Senior Engineer
Micron
Fab 10A, Singapore
4mo
Coordinate improvements in Yield, Quality, and Output for DRAM/NAND process and production lines by designing, executing, and analyzing experiments to optimize fab processes.
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Senior / Principal Engineer, NAND Product Engineering
Micron
Fab 10N/X, Singapore
4mo
Senior engineer driving NAND product development by integrating AI solutions, automating data workflows, and aligning technical requirements with business units to accelerate time-to-market for next-gen memory technologies.
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Technical Lead – Algorithm Developer
Amat
Bangalore,IND
4mo
Develop and optimize image processing and deep learning algorithms for defect detection and pattern recognition in semiconductor optical wafer inspection tools.
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MTS Digital Design Engineer
ON Semiconductor
San Jose, CA, United States
$169k–$169k
4mo
Lead digital IC design architecture and RTL implementation for power management chips including multiphase controllers, smart power FETs, and DC-DC converters.
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R&D Engineering, Principal Engineer
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Synopsys
Madrid, MD, ES
4mo
Principal Engineer leading architecture, research, and technical strategy for simulation software used in semiconductor design.
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Frontend Central Product Integration Engineering (cPIE) Transformative HVB (high-value-bits) Engineer
Micron
Singapore, Singapore
4mo
Coordinate improvements in Yield, Quality, and Output for DRAM/NAND process and production lines by designing experiments and analyzing complex data.
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Staff SoC Verification and Emulation Engineer
Arm
Austin, Texas
$198k–$198k
4mo
Building early performance analysis platforms for future Arm System/SoC architecture using workload characterization and analysis.
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Frontend Central Product Integration Engineering (cPIE) Transformative HVB (high-value-bits) Engineer
Micron
Fab 10A, Singapore
4mo
Coordinate improvements in yield, quality, and output for DRAM/NAND process and production lines by designing experiments and analyzing complex data.
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MTS Silicon System Architect
Micron
Bengaluru, India
4mo
Define and own IP architecture and micro-architecture for complex digital IP blocks, translating system-level requirements into scalable solutions for memory and storage products.
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Senior Software Engineer
Siemens-Eda
New Cairo, EGY, Egypt
$34k–$34k
4mo
Design and develop core software for synthetic layout generation, design rule validation, and early process enablement for advanced semiconductor nodes.
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AE Consultant-DVT
Siemens-Eda
Hsinchu, TWN, Taiwan
4mo
Applications Engineer providing technical support, software deployment, and training for customers using Siemens EDA design verification tools.
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Python Technical Lead – Engineering
Amat
Bangalore,IND
4mo
Lead and architect complex Python-based solutions and package management systems for semiconductor manufacturing equipment.
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Timing closure expert
Texas Instruments
Bengaluru, Karnataka, India
4mo
Design and verify high-speed mixed-signal communication circuits and digital interfaces for leading-edge analog systems.
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Algorithm Engineer (Deep Learning/C++)(E)
Kla
Ann Arbor, Washtenaw County
$91k–$91k
4mo
Developing and productizing deep learning and image processing algorithms for semiconductor wafer and reticle inspection.
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Software Architect
Nxp
Austin (Oakhill, Office), US
4mo
Architecting and delivering high-performance semiconductor and EDA solutions for complex system-level challenges.
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Gate-level IR/EM CAD/NLP Engineer (m/f/d)
Apple
US
4mo
Developing an analytic platform to identify and recommend solutions for signoff IR/EM analysis using machine learning and large language models.
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Inverter Hardware Module developer( internalpower supply)逆变器硬件模块开发工程师(内部电源)_EM
Bosch-Group
Suzhou, Jiangsu, cn
4mo
Develop inverter hardware modules, specifically internal power supply units, by defining supply concepts, selecting components, and optimizing switching behavior.
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Senior Software Engineer - Calibre PERC
Siemens-Eda
Wilsonville, OR, United States
$130k–$233k
4mo
Design and implementation of new features and enhancements for high performance circuit reliability verification solutions in Electronic Design Automation.
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Staff CAD Design Automation Engineer
Micron
Boise, ID - Main Site
4mo
Develop, improve, and support CAD software, EDA tools, and flows for CMOS design and verification at scale.
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Gate-level IR/EM CAD/NLP Engineer
Apple
Mc Neil, Travis County
4mo
Developing an analytic platform to identify and recommend solutions for signoff IR/EM analysis using machine learning and large language models.
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Design Engineering Architect
Cadence
CORK 01
4mo
Technical leadership of complex Intellectual Property (IP) including UCIe, Ethernet, HBM, and PCIe for high-tech markets.
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Senior Engineer, CAD
Micron
Hyderabad - Phoenix Aquila, India
4mo
Develop and optimize analog and digital circuit simulation flows to reduce pre-silicon failures and enhance productivity for memory and storage product development.
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Senior Engineer, CAD
Micron
Hyderabad - Phoenix Aquila, India
4mo
Evaluating, improving, and debugging Electronic Design Automation (EDA) tools and flows to enable hardware verification and increase design team productivity.
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Senior Engineer, Design Verification Engineering
Analogdevices
US, TX, Dallas, Tollway
$117k–$117k
4mo
Senior Design Verification Engineer creating self-checking test benches and simulation environments to validate analog, digital, and mixed-signal IC designs before production.
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FE CPIE PI Principal/Staff Engineer
Micron
Boise, ID - ID1
4mo
Develop and optimize semiconductor manufacturing processes to drive rapid product maturity, improve yield, and standardize best-known methods across global DRAM and NAND sites.
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Capacity Planner (Front-End)
ON Semiconductor
Bucheon-si, Gyeonggi-do, Korea, Republic of
4mo
Oversees long-term and short-term capacity forecasting, modeling, and system constraint solutions to optimize factory production plans and balance supply against demand for seamless customer delivery.
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Engineer - NAND Generators
Micron
Boise, ID - Main Site
4mo
Build NAND generators and ensure quality reticle generation tasks for tapeout processes.
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Instandhalter Backend (w/m/div.)
Bosch-Group
Dresden, SN, de
4mo
Performing scheduled maintenance, inspections, and troubleshooting on production machinery to ensure product quality and process stability.
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CMOS Test Data Processing & Automation Software Engineer
Quobly
Grenoble, Isère
4mo
Develop Python-based pipelines and automation tools to ingest, process, and analyze wafer-level CMOS electrical test data (IV, CV, parametric tests) for the CMOS Characterization team.
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Principal Node Development Product Engineer, DPAG
Micron
Boise, ID - Main Site
4mo
Drive product readiness for next-generation DRAM by translating silicon behavior into actionable decisions across process, design, and manufacturing teams.
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Senior Engineer, Digital Design Engineering
Analogdevices
US, CO, Colorado Springs, Chapel Hills
$112k–$112k
4mo
Design and verify digital and mixed-signal integrated circuits (ASIC/FPGA) for industries including healthcare, aerospace, and defense.
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Principal Node Development Product Engineer, DPAG
Micron
Boise, Idaho, United States of America
4mo
Drive product readiness for next-generation DRAM by bridging process technology, product requirements, and manufacturing execution.
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Mixed-Signal Design Developer
Cisco
Kanata, Ontario, Canada
4mo
Architect, design, layout, measure, and productize ultra-deep sub-micron CMOS products for high-speed (>25Gb/s) and high-accuracy analog designs in optical communications.
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Principal / Senior / Engineer, TCAD DRAM
Micron
Hiroshima, Japan
4mo
Model, simulate, and analyze advanced semiconductor devices and processes for future memory products using physics-based TCAD tools.
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RTL Design Engineers
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Remote
$208k–$208k
4mo
Review AI outputs against RTL Design Engineers specialist operations workflows, playbooks, and firm policy to grade correctness, flag risks, and document next steps for model training.
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Principal Engineer, Frontend Central Product Integration Engineering (cPIE) Transformative HVB (high-value-bits)
Micron
Fab 10A, Singapore
4mo
Architecting data solutions and frameworks to identify and prioritize yield, quality, and reliability improvements in semiconductor manufacturing processes.
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Engineer - PIE YE
Micron
Fab 10N/X, Singapore
4mo
Analyze yield data and semiconductor device physics to resolve manufacturing yield issues in wafer fabrication processes.
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Design Verification Manager
Texas Instruments
Bengaluru, Karnataka, India
4mo
Driving SoC Design Verification (DV) and Analog Verification (AVnV) for high-growth markets including AI-driven data centers and humanoid systems.
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Software Database Engineer
Texas Instruments
Bengaluru, Karnataka, India
4mo
Design and development of new software tools, scripts, and interfaces for use in the PG (Pattern Generation) process.
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Sr Principal Product Engineer
Cadence
NOIDA
4mo
Sr Principal Product Engineer specializing in Static Timing Analysis (STA) tools and methodologies, acting as a bridge between customers and R&D to drive best-in-class timing signoff solutions.
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Lead Design Engineer
Cadence
PUNE 04
4mo
Define the strategic vision and infrastructure for verification of next-generation Tensilica advanced CPU cores and configurable processors.
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Senior Systems Software Engineer - Advanced Technology Group
NVIDIA
US, OR, Hillsboro
$152k–$152k
4mo
Developing industry-leading advanced computational methods for semiconductor manufacturing and design, leveraging GPUs to accelerate software solutions and improve yield/time-to-market.
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Staff Engineer, TEM
Micron
Fab 10N/X, Singapore
4mo
Develop and apply advanced Transmission Electron Microscope (TEM) characterization methods for atomic-scale device analysis in next-generation memory technology.
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Front End Central Product Integration (FE cPIE) Principal Engineer/Senior Manager
Micron
Singapore, Singapore
4mo
Drive leading edge HBM product yield, quality improvement, and new product introduction (NPI) through technical expertise and business process management.
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Software Engineer
Siemens-Eda
Yerevan, ARM, Armenia
4mo
Develop innovative automation solutions and optimize DFT methodologies for 2.5D and 3D System-in-Package (SIP) design to streamline chip manufacturing tests.
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Front End Central Product Integration (FE cPIE) Principal Engineer/Senior Manager
Micron
Fab 10A, Singapore
4mo
Leading edge HBM Product yield, quality improvement, and new product introduction (NPI) through technical expertise and business process management.
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Algorithm Engineer - Deep Learning
Kla
Milpitas, Santa Clara County
5mo
Developing Deep Learning and GenAI models for image processing and computer vision in semiconductor process control.
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Senior Applications Engineer - Emulation
Siemens-Eda
Costa Mesa, CA, United States
$167k–$167k
5mo
Deploying emulation software and hardware solutions at customer sites, guiding them through successful design bring-up, and refining prototyping methodologies.
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Applied Machine Learning Engineer, Circuit Design - New College Grad 2026
NVIDIA
US, CA, Santa Clara
$116k–$116k
5mo
Building AI-driven software systems for circuit design using automation algorithms, deep learning models, and agentic workflows to accelerate end-to-end design automation.
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Technology Enablement Engineer(Tessent)
Siemens-Eda
Seongnam, KOR, South Korea
5mo
Technical Enablement Engineer driving customer adoption of DFT solutions and delivering technical guidance on SoC DFT methodologies.
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