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Staff GenAI Engineer - Silicon Design

San Jose, CA💼 Full-time💰 $170,000–$170,000🗓 2026-09-01 → 2026-09-25

Core

Develop AI-driven automation solutions and scalable CAD methodologies to transform memory design workflows, reducing manual effort and accelerating time-to-tapeout for silicon products.

Role type

Staff GenAI Engineer (Silicon Design & EDA Automation)

Builds

Automated layout generation, floor planning, AMS, and PDN solutions integrated into EDA toolchains.

Domain

Semiconductor industry, Memory design, Electronic Design Automation (EDA), Silicon design flows.

Deliverable

production ML models | product features

Required skills

Python, Tcl, C++, EDA tool integration, design automation, floor planning, layout automation, AMS, PDN, design-space exploration, semiconductor design flows.

Preferred skills

Memory design, custom layouts, advanced-node technologies, machine learning for design automation, Synopsys/Cadence/Siemens EDA platforms.

Technologies

Python, Tcl, C++, Synopsys, Cadence, Siemens, EDA tools.

Responsibilities

Develop automation for layout generation, floor planning, AMS, and PDN; Create scalable CAD methodologies; Build software frameworks integrating EDA tools; Automate analysis, debugging, and optimization processes; Collaborate with engineering teams to deploy design solutions; Apply AI to accelerate design convergence.

Seniority

Staff, hands-on IC with strategic impact

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