Intern - DRAM Design Rules
Core
Develop and maintain design rules, methodologies, and automation solutions for advanced memory technologies (DRAM) to enable successful design and manufacturing.
Role type
Intern, DRAM Design Rules Engineer
Builds
Next-generation memory products (DRAM, HBM)
Domain
Semiconductor manufacturing / Memory technology
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Semiconductor device understanding, CMOS circuits knowledge, Semiconductor manufacturing process knowledge, Python/Tcl/Perl scripting, Analytical problem-solving, Debugging
Preferred skills
VLSI Design, Physical Design, Layout Design, Design Rule Checking (DRC), Physical Verification, EDA tools (Cadence Virtuoso, Calibre, Synopsys), Python automation, Data analytics, Machine Learning, AI/LLM applications, Test chip design, Silicon characterization
Technologies
Python, Tcl, Perl, Cadence Virtuoso, Calibre, Synopsys, EDA tools, AI frameworks
Responsibilities
Develop, document, validate, and optimize semiconductor design rules; Create methodologies, automation scripts, and workflows for design enablement; Perform design rule validation and analysis using EDA tools and AI; Collaborate with Design, CAD, and Process Integration teams on technology features and manufacturability; Support test chip planning and data analysis using AI.
Seniority
Intern