Lead Software Engineer - Logic Synthesis
Core
Develop and maintain the synthesizer for Palladium, implementing new VHDL/Verilog features and optimizing logic performance.
Role type
Lead Software Engineer - Logic Synthesis
Builds
Logic synthesis tools for semiconductor design
Domain
Electronic Design Automation (EDA) / Semiconductor
Deliverable
production ML models | product features
Required skills
C/C++, Operating system concepts, RTL modeling (Verilog/SV, VHDL, SysC), Logic optimization
Preferred skills
UVM/SC/TLM verification, EDA/CAD tool development, AI tools (Copilot/Claude)
Technologies
C, C++, Verilog, SystemVerilog, VHDL, SysC, UVM, SC, TLM
Responsibilities
Develop and maintain the synthesizer for Palladium, Implement new VHDL/Verilog feature support, Perform logic optimization and performance improvement
Seniority
Senior, hands-on IC
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