CareerPlan

Staff GenAI Engineer - Silicon Design

San Jose, California, United States of AmericaFull-time$170k2026-09-01 → 2026-11-10

Core

Transform memory design workflows using AI and automation to reduce manual effort, improve quality, and accelerate time-to-tapeout for memory products.

Role type

Staff GenAI Engineer (Silicon Design)

Builds

Automation solutions for layout generation, floor planning, AMS, and PDN; scalable CAD methodologies; software frameworks integrating EDA tools.

Domain

Semiconductor / Memory Design / EDA

Deliverable

production ML models

Required skills

Python, Tcl, C++, EDA tool integration, design automation, floor planning, layout, AMS, power integrity, semiconductor design flows

Preferred skills

Memory design, custom layouts, advanced-node technologies, layout automation, floorplanning, machine learning, Synopsys, Cadence, Siemens

Responsibilities

Develop automation solutions for layout generation, floor planning, AMS, and PDN; Create scalable CAD methodologies improving design quality and productivity; Build software frameworks integrating EDA tools and design workflows; Automate analysis, debugging, optimization, and design-space exploration processes; Collaborate with engineering teams to deploy advanced design solutions; Apply AI and analytics to accelerate design convergence and closure.