796 open positions
Silicon Design-for-Test (DFT) Engineer
MatXTime To Recharge 4 weeks paid time off (accrued), 12 company holidays, and 3 wee
$120k–$120k
Design and implement Design-for-Test (DFT) solutions for high-performance silicon (SERDES PHY, compute, memory, connectivity) to ensure functional accuracy and performance for AGI compute platforms.
← Select a job to preview