SDE, MLA hardware/software co-design, Annapurna Labs Machine Learning Acceleration
Core
Pre-silicon hardware/software co-development for machine learning chips, focusing on building new silicon functionality and verifying SoC end-to-end performance.
Role type
Senior IC embedded software engineer (hardware co-design)
Builds
New silicon functionality for ML chips
Domain
Semiconductor hardware design and embedded software
Deliverable
production ML models
Required skills
bare-metal software development, SoC verification, embedded system development, debugging architecture and algorithms, logic verification from IP blocks to full system
Preferred skills
formal verification techniques, Python scripting, Perl scripting
Technologies
Python, Perl
Responsibilities
Write bare-metal software to verify SoC functionality and performance, collaborate with architecture and design teams, debug architecture and algorithm issues
Seniority
Senior, hands-on IC
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