Silicon Validation

1,126 open positions

Product Validation Engineer II CadenceBEIJING 8y Develop test procedures, cases, and designs to validate SPICE/Spectre analog mixed-signal simulators, troubleshoot issues, and automate testing.
Pre-Silicon Validation Engineer (Mixed Signal) UsmHillsboro, OR, us 9y Functional validation of mixed-signal products using simulation tools to ensure design correctness.
Software Test Engineer Procom-ServicesChandler, AZ, us 11y Develop tests to validate SSD firmware, including test strategy, coding, debugging, and environment setup.
芯片SLT测试工程师-芯片研发（上海） ByteDance上海 Design and execute System Level Test (SLT) plans for CPU and AI SoC chips, managing test environments and analyzing results to identify functional defects.
高速接口Validation Engineer（存算与AI） - 芯片研发 ByteDance深圳 Analyze and validate high-speed interface IP for in-memory computing chips to ensure performance targets (rate, BER) are met for AI large model applications.
腾讯云服务器DIAG工程师 TencentShenzhen, China Design, validate, and manage DIAG test solutions for Tencent's self-developed servers (L6, L10) and new components like NICs, GPUs, and HBA cards to ensure production quality.
芯片存储与内存子系统硅后验证工程师（芯片平台） - 芯片研发 ByteDance深圳 End-to-end post-silicon board-level validation for ByteDance's self-developed chips, focusing on SOC storage and memory subsystems to support mass production.
芯片EVB板级系统验证工程师-芯片研发（北京） ByteDance北京 End-to-end responsibility for post-silicon EVB board-level verification and mass production support for ByteDance's self-developed chips.
工程测试工程师（存算与AI） - 芯片研发 ByteDance杭州 Develop and validate functional test cases for storage-computing AI chips using FPGA and silicon prototypes to support high-efficiency AI model applications.
Sr. Engineer, Systems and Hardware Validation Ayar LabsSan Jose $145k–$160k Lead validation strategy and product bring-up for silicon photonic and laser products, ensuring they meet component and system-level requirements for optical interconnect technology.
Senior Silicon Validation Engineer (On-site. Bengaluru, India) IxanaBengaluru, India Own post-silicon validation for Wi-R communication chips, setting up lab environments and developing tools for performance and power analysis.
系统固件验证工程师（NAND方向/存算与AI） - 芯片研发 ByteDance北京 Design and execute test plans for NAND flash media and controller synergy in solid-state storage products, focusing on reliability, aging screening, and failure analysis to support high-efficiency AI chip development.
高速接口资深驱动工程师（存算与AI） - 芯片研发 ByteDance北京 Develop pre-silicon IP verification and post-silicon drivers for high-speed interfaces (USB3+/PCIe/DDR/UCIe/SerDes) in storage-computing and AI chips.
Internship - Lab Verification Engineer in the AMS Lab of the Development Center Villach (f/m/div) Infineon Technologies Austria AGVillach Internship role supporting the Analog-Mixed-Signal (AMS) verification laboratory at Infineon's Development Center Villach, focusing on measurement, debugging, and data management for analog and digital devices.
Internship - High Speed and RF LAB Validation Engineer in Development Center Villach (f/m/div) Infineon Technologies Austria AGVillach Support the validation of new semiconductor solutions by performing high-speed and RF measurements, debugging, and data processing for digital communication and radar applications.
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Senior System Verification Engineer (f/m/div) Villach Define system verification concepts and tests for hard-, soft-, and firmware components while developing measurement test benches and automations.
NFC/UWB System Validation Engineer (m/f/d) NXP Semiconductors Austria GmbH & Co KG Standort GratkornGratkorn Ensure quality, reliability, and performance of NFC and UWB solutions from a customer and system perspective throughout the product development lifecycle.
服务器装备测试/Diag工程师 ByteDance深圳 Design and develop factory test capabilities, test platforms, and diagnostic (Diag) software for server hardware products to ensure quality before shipment.
系统固件验证工程师（存算与AI） - 芯片研发 ByteDance北京 Design and validate firmware-controller co-verification solutions for SSD/UFS storage products, ensuring reliability across hardware architecture and firmware logic.
芯片互联与高速接口硅后验证架构师（芯片平台） - 芯片研发 ByteDance深圳 End-to-end post-silicon EVB board-level validation and productization support for ByteDance's self-developed chips, ensuring validation quality for on-chip interconnects and high-speed interfaces.
SSD固件白盒测试工程师 - AI算力基础设施 ByteDance上海 Designing and executing white-box testing for enterprise-grade PCIe/NVMe SSD firmware to ensure protocol consistency, data path integrity, reliability, and performance.
芯片EVB板级验证项目经理-芯片研发 ByteDance上海 End-to-end ownership of silicon post-EVB board-level validation and productization mass production delivery for ByteDance's self-developed chips.
SSD固件白盒测试工程师-Data ByteDance杭州 Designing and executing white-box testing for enterprise-grade PCIe/NVMe SSD firmware, covering protocol consistency, data paths, exception handling, reliability, stability, and performance.
芯片板级验证开发工程师-Data ByteDance杭州 Define system specifications and overall design for chip board-level validation, collaborating with backend teams on signal, electrical, packaging, and thermal characteristics.
服务器装备测试/Diag 工程师 ByteDance北京 Designing and developing factory test capabilities, test platforms, and diagnostic (Diag) software for x86/ARM server products to ensure quality before shipment.
芯片SLT测试工程师-芯片研发（深圳） ByteDance深圳 Design and execute System Level Test (SLT) plans for CPU and AI SoC chips, including functional, performance, compatibility, and reliability testing.

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