芯片存储与内存子系统硅后验证工程师（芯片平台） - 芯片研发
Core
End-to-end post-silicon board-level validation for ByteDance's self-developed chips, focusing on SOC storage and memory subsystems to support mass production.
Role type
Senior IC post-silicon validation engineer (memory/storage subsystems)
Builds
High-speed memory and storage interfaces (DDR6/5, LPDDR6/5, HBM) and on-package storage media for data center/AI chips
Domain
Semiconductor design, Data Center, AI Infrastructure
Deliverable
production ML models
Required skills
Electrical Validation (EV), Signal Integrity Validation (SIV), SI/PI tuning, RAS strategy validation, Protocol compliance validation, PVT validation, System margin analysis, High-speed oscilloscope/logic analyzer usage, Memory initialization/training/calibration, DFX, BIST
Preferred skills
Advanced packaging knowledge, MCM/CoWoS validation, HBM/DRAM/SRAM integration, AI cluster data flow understanding, JEDEC standard expertise
Technologies
DDR6/5, LPDDR6/5, HBM3/4, MCM, CoWoS, BIST, Logic Analyzers, Protocol Analyzers
Responsibilities
Define validation strategies and test plans, Execute electrical and signal integrity tests, Debug and resolve interface issues, Analyze test results and generate reports, Collaborate on package-level storage media validation, Support mass production ramp-up
Seniority
Senior, hands-on IC
