Pre-Silicon Validation Engineer (Mixed Signal)
Core
Functional validation of mixed-signal products using simulation tools to ensure design correctness.
Role type
Pre-Silicon Validation Engineer (Mixed Signal)
Builds
Validation infrastructure, test plans, and verification collateral for analog and digital components.
Domain
Semiconductor / Mixed-Signal IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog and mixed-signal circuit understanding, Digital logic design, Verilog/VHDL, High-speed I/O interfaces (DDR, PCI-express, USB), Computer architecture, Scripting (Perl/Shell), Circuit simulation (Pspice), UNIX/Linux
Preferred skills
Verilog-A/VHDL-A/AMS, Mixed-signal simulation tools (Cadence AMS, Mentor ADMS), SOC/ASIC verification, Post-si debug, C/C++/System C
Technologies
Verilog, VHDL, Pspice, Cadence AMS, Mentor ADMS, Perl, Shell, UNIX, Linux, DDR, PCI-express, USB
Responsibilities
Functional validation of products with analog and digital components, Defining and developing validation infrastructure tests and checkers, Reading technical specs and creating documentation, Understanding DUT specifications and defining validation strategy, Creating test plans and execution software
Seniority
Mid-level IC Engineer