Silicon Validation

537 open positions

PCB Hardware Validation Engineer EtchedaiHardware Engineering 6mo Validating functionality, power margins, and signal integrity of custom AI ASICs and PCBs to ensure robust hardware performance for real-time video generation and deep reasoning models.
Product Validation Engineer II - Verisium Debug QA Cadence Design Systems, Inc.Belo Horizonte, Minas Gerais 6mo Design and execute test strategies and plans to validate software enhancements and fixes for electronic design automation tools.
Electrical Engineering Technician EtchedSan Jose 6mo Hands-on support for hardware development and validation, executing electrical test procedures and maintaining lab environments for frontier intelligence chips.
(Senior) Design Verification Engineer AlifsemiOulu, Finland 6mo Design Verification Engineer focusing on Peripheral verification for intelligent microcontrollers and embedded ARM processor cores.
ASIC digital verification engineer_RBCN/ME Bosch-GroupShanghai, Shanghai, cn 6mo Responsible for automotive ASIC chip development, setting up verification environments and tool flows, and performing function and timing verifications.
Sr. Manager Verification SemtechIND - Hyderabad 6mo Lead and manage a team of verification engineers to ensure high-quality, timely delivery of digital and mixed-signal integrated circuit designs.
SoC Design Verification Lead AlteraBengaluru, Karnataka, India 6mo Lead SoC architecture verification including creating verification strategy, developing test cases and test benches using UVM methodology to enable effective verification of full chip and/or system functionality.
Mixed Signal Design Validation Engineer NVIDIAUS, CA, Santa Clara $168k–$168k6mo Develop and implement validation test suites, debug high-speed mixed-signal circuits and electro-optical transceivers, and characterize silicon performance across process, voltage, and temperature variations.
SOC Design Verification Engineer Samsung ElectronicsSSIR, Goldstone, Bangalore, India 6mo Developing and executing verification strategies for System-on-Chip (SoC) and IP blocks, ensuring functional coverage and sign-off from test plan development to gate-level simulation.
Senior Mixed Signal Design Validation Engineer NVIDIAUS, CA, Santa Clara $168k–$168k7mo Lead bring-up, characterization, and validation of high-speed mixed-signal memory interfaces (LPDDR, GDDR, HBM) for NVIDIA GPUs and AI platforms.
USB Design Verification Leader MediaTekHefei 7mo Lead AMS IP Design Verification using UVM-based environments to establish and enhance verification capabilities for AMS IP or Chip DV teams.
Power-Domain Verification Lead AxiadoHyderabad, TS, in 7mo Lead verification for power-aware simulations and RTL SoC/subsystem verification focusing on power domains, states, and transitions in Smart Edge SoCs.
Hardware Validation Engineer EtchedSan Jose 7mo Validate system hardware and PCB functionality, ensuring robust power and signal margins across interfaces like PCIe and I2C for frontier intelligence infrastructure.
HSI (High-Speed Interface) PHY System Design Validation Engineer MediaTekHsinChu 8mo Develop and execute validation plans for High-Speed Interface (HSI) systems including PCIe, USB, DP, HDMI, UFS, CSI, and UCIe PHY.
Failure Analysis Hardware Validation Engineer NxpKuala Lumpur 8mo Validate electrical test hardware and test patterns for NXP product analysis to ensure accuracy and reliability.
ASIC Verification Engineer EspaceSaratoga, CA 8mo Designing, simulating, and verifying high-performance digital, analog, and RF integrated circuits for 5G, IoT, and satellite communications applications.
Validation Engineer Texas InstrumentsBengaluru, Karnataka, India 8mo Validating RF Transceiver SoCs for Wireless-LAN (WIFI) and Ultra-Wideband Systems, focusing on debugging, RF measurements, and PCB development.
Senior Mixed Signal Design Validation Engineer NVIDIAUS, CA, Santa Clara $168k–$168k8mo Lead bring-up, characterization, and system validation of high-speed mixed-signal circuits and electro-optical transceivers.
Senior Hardware Validation Engineer NVIDIAUS, CA, Santa Clara $136k–$136k8mo Develop and implement complex automated test plans for industry-leading GPU accelerated computing products, owning validation from start to finish including test execution, bug resolution, and release to production.
USB and System Level Verification Lead MediaTekBangalore 8mo Lead verification efforts for high-speed IOs and USB components in cutting-edge SoC designs to ensure quality and reliability.
Software Verification Engineer NVIDIAUkraine, Kyiv 10mo Build automated verification environments for high-end hardware and software, focusing on NVIDIA Storage solutions.
Manager, DFT Architecture NVIDIAIsrael, Yokneam 11mo Lead the DFT architecture and test solutions for NVIDIA's high-speed network products (HCA), ensuring product quality and testability.
Intern-Product Validation CadenceSHANGHAI 11mo Assist in the development and validation of Cadence Innovus Digital Implementation System through test case maintenance and suite development.
Post-Silicon Validation Engineer EtchedSan Jose 11mo Bringing up, validating, and characterizing ASICs from first silicon through production ramp for AI/ML accelerator hardware.
Sub System Verification Lead MediaTekBangalore 1y Lead verification for functional subsystems in MediaTek's next-gen SoC products for TV, Automotive, and 5G domains.
Manager, Hardware and System Development Engineering NVIDIAIsrael, Yokneam 1y Lead the creation and optimization of advanced test and validation platforms for NVIDIA's high-performance networking products, covering both R&D and mass production testing.
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Runset QA Engineer UK 1y Execute physical verification runsets (DRC, LVS, illegal layer, TUC, fill, LU/IOGNAC, denall, tic, tapein merge, IPC) for Synopsys ICV, Siemens Calibre, and Cadence Pegasus on Intel chip-level databases to mimic virtual tape-in.
Sr Principal Product Validation Engineer CadenceBEIJING 1y Plan and develop strategy to test and qualify SPICE simulators, build tools to improve test process and coverage, and enhance product quality.
Lead Solutions Engineer CadenceBANGALORE, IN 2y Develop constrained random verification environments, test plans, and coverage strategies for System on Chip (SoC) verification.
Principal Product Validation Engineer CadenceNOIDA 2y Designing and implementing complex functional verification environments for SoC verification using Hardware Verification Languages.
Analog/Mixed-Signal Design Verification Methodology Development Engineer MediaTekHsinChu 2y Establish, streamline, and enhance Analog/Mixed-Signal (AMS) Design Verification (DV) methodologies, coding processes, and integration flows to ensure high-quality pre-silicon verification delivery.
Product Validation Engineer II CadenceBEIJING 8y Develop test procedures, cases, and designs to validate SPICE/Spectre analog mixed-signal simulators, troubleshoot issues, and automate testing.
Pre-Silicon Validation Engineer (Mixed Signal) UsmHillsboro, OR, us 9y Functional validation of mixed-signal products using simulation tools to ensure design correctness.
Software Test Engineer Procom-ServicesChandler, AZ, us 11y Develop tests to validate SSD firmware, including test strategy, coding, debugging, and environment setup.
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Senior System Verification Engineer (f/m/div) Villach Define system verification concepts and tests for hard-, soft-, and firmware components while developing measurement test benches and automations.
Senior Silicon Validation Engineer (On-site. Bengaluru, India) IxanaBengaluru, India Own post-silicon validation for Wi-R communication chips, setting up lab environments and developing tools for performance and power analysis.
Sr. Engineer, Systems and Hardware Validation Ayar LabsRemote Work Policy $145k–$145k Lead validation strategy and execution for silicon photonic and laser products, ensuring they meet component and system-level requirements for optical interconnect technology.

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