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DDR Functional Validation Engineer

Austin (Oakhill, Office), US💼 Full-time🗓 2026-09-25 → 2026-09-27

Core

Perform LPDDR/DDR functional validation of SoC products including controller and sub-system level testing on pre-silicon emulation and post-silicon boards.

Role type

Senior Principal SoC Validation Engineer (Memory Interface)

Builds

SoC products with validated LPDDR/DDR interfaces

Domain

Semiconductor / Memory Interface Validation

Required skills

LPDDR4/5 and DDR5 protocol knowledge, C programming, logic analyzer usage, oscilloscope usage, protocol analyzer usage, test plan development, test content development, failure debugging, SoC architecture understanding

Preferred skills

Team leadership, technical documentation, cross-functional collaboration

Technologies

LPDDR4, LPDDR5, DDR5, pre-silicon emulation models, post-silicon validation boards

Responsibilities

Prepare validation setups, execute tests, collect and summarize data, debug test failures, maintain validation plans and technical records

Seniority

Principal / Sr Principal, hands-on IC with team leadership

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