Analog and Mixed Signal Layout Engineer
Core
Design and implement complex analog, mixed-signal, and RF layouts for high-performance connectivity IPs, translating schematics into robust physical implementations from floorplanning through tapeout.
Role type
Senior IC analog and mixed-signal layout engineer
Builds
High-speed connectivity IPs for AI, networking, and next-generation compute systems (via careerplan.io/jobs/ff1c4bac-e6e8-44df-8c11-c54152ccdbfd-analog-and-mixed-signal-layout-engineer-at-lumilens)
Domain
Semiconductor / Photonics / High-performance computing
Required skills
Full-custom layout, DRC/LVS/ERC/DFM/EMIR signoff, RC extraction, SerDes/data converters/clocking circuits layout, advanced semiconductor process technologies (CMOS/FinFET/BiCMOS/SiGe), Cadence Virtuoso, automation/scripting/AI-assisted workflows, layout-dependent effects, matching/shielding/power planning/ESD/latch-up prevention
Preferred skills
Silicon photonics, co-packaged optics (CPO), near-package optics (NPO), optical transceivers, high-bandwidth connectivity solutions
Technologies
Cadence Virtuoso, EDA tools
Responsibilities
Floorplanning, device placement, routing, physical verification and signoff closure, optimizing layouts using extraction results, contributing to layout reviews and methodologies, improving layout productivity through automation
Seniority
Senior, hands-on IC
