Engineer-PDN
Core
Developing electrical signoff methodologies for power, performance, and system integration in custom SoC and CPU chip design.
Role type
Senior IC physical design engineer (PDN/Sign-off) (via careerplan.io/jobs/100083846784-engineer-pdn-at-arm)
Builds
Robust flows and methodologies for PDN sign-off on latest nodes using 2.5D and 3D technologies
Domain
Semiconductor / IC Design / Physical Design
Required skills
ASIC implementation, EM/IR analysis, PDN analysis, Static/Dynamic power distribution analysis, ESD analysis, EDA tool development, Tcl/Perl/Python scripting, RTL to GDS2 flow knowledge
Preferred skills
Arm-based SoC knowledge, Low power design techniques (power gating, voltage/frequency scaling), Advanced scripting languages (C, C++, Java, R, Ruby)
Responsibilities
Develop robust flows and methodologies for PDN sign-off on latest nodes; Work on sign-off methodologies like Static/Dynamic Power Distribution, Electro-migration, ESD Analysis; Convert R&D concepts into real implementation solutions; Enable partners to achieve best possible quality of results
Seniority
Mid-level, hands-on IC engineer
