STAFF ENG-HIG-HBM-LAYOUT
Core
Lead the layout design and development of complex analog, mixed-signal, and digital blocks and full chip level integration for memory and storage solutions.
Role type
Staff IC Layout Engineer (Memory/Analog/Mixed-Signal)
Builds
High-quality block-level layouts and full chip integrations for DRAM, NAND, and NOR memory products
Domain
Semiconductor / VLSI Design / Memory Technology
Required skills
IC layout design, LVS/DRC/Antenna verification, Cadence VLE/VXL, Mentor Graphics Calibre, Memory array layout, Analog/Mixed-signal block design, Tapeout experience, Project management, Technical mentorship
Preferred skills
Memory architecture knowledge, Advanced CMOS process nodes (Planar/FinFET), Cross-functional coordination
Technologies
Cadence VLE, Cadence VXL, Mentor Graphics Calibre, FinFET, Planar CMOS
Responsibilities
Lead layout design and development of complex analog, mixed-signal, and digital blocks; Perform layout verification including LVS, DRC, and antenna checks; Provide technical guidance and mentorship to junior team members; Manage multiple layout projects ensuring quality and timely delivery; Collaborate with global engineering teams for successful integration.
Seniority
Staff, hands-on IC with leadership and mentorship