Senior Engineer- memory compiler flow development
Core
Develop, improve, and support tools/flows for memory compiler development, focusing on generating physical views (GDSII, LEF, NDM, CDL) for embedded memories.
Role type
Senior IC software engineer (EDA tool development)
Builds
Physical views and flows for embedded memory compilers
Domain
Semiconductor EDA / Physical Design (via careerplan.io/jobs/100795904976-senior-engineer-memory-compiler-flow-development-at-arm)
Required skills
C/C++, Java, Python, shell scripting, Git/Gerrit, CI/CD, test automation, digital circuit design fundamentals, AI/LLM-driven development
Preferred skills
circuit & layout design, memory compilers, tiling, netlist stitching, EDA flows (Cadence DB, SKILL, place and route, LVS, DRC, extraction)
Responsibilities
Develop and support memory compiler tools for physical view generation; Maintain and improve testing of internal tools using EDA flows; Automate tool development, validation, and release workflows using scripting and AI-assisted tools
Seniority
Senior, hands-on IC