Senior Analog/Mixed Signal IC Layout Engineer
Core
Senior IC layout engineer responsible for full custom analog/mixed-signal sub-blocks, floorplanning, verification, and tapeout for data center and energy infrastructure products.
Role type
Senior IC layout engineer (analog/mixed-signal)
Builds
High-reliability power, connectivity, and analytics solutions for data centers and energy infrastructure
Domain
Semiconductor / Analog & Mixed-Signal IC Design
Deliverable
production ML models | product features
Required skills
Full custom IC layout, Cadence Virtuoso, VXL, LVS/DRC/ANTENNA verification, layout matching, parasitic extraction, noise analysis, shielding, supply consideration, latch-up prevention, ESD design
Preferred skills
Deep submicron (FinFET) technology, precision analog circuits (amplifiers, voltage references, current mirrors)
Technologies
Cadence Virtuoso, VXL
Responsibilities
Own layout of large-scale analog/digital sub-blocks including scheduling, floorplanning, verification, and tapeout; Collaborate with design and support teams (foundry, assembly, reliability, failure analysis) to achieve product performance and quality
Seniority
Senior, hands-on IC
