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Senior Staff Engineer, Physical Design

3900 N Capital of Texas Hwy, Austin, TX, USA💼 Full-time💰 $180,200–$180,200🗓 2026-09-22 → 2026-09-26

Core

Senior Staff GPU Physical Design Engineer shaping physical implementation and methodology innovation for high-performance GPU and system-level IP to achieve market-differentiating power, performance, and area (PPA) goals.

Role type

Senior Staff IC physical design engineer

Builds

High-performance GPU and SoC IPs for mobile, automotive, and custom market segments

Domain

Semiconductor / Advanced Node Physical Design

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> production ML models (Incorrect mapping in thought, correcting to physical/clinical work equivalent for hardware: physical/clinical work is wrong, it's infrastructure/product features. Let's use 'product features' or 'infrastructure'. The role builds IP. Let's use 'product features' as IP is a feature of the chip, or 'infrastructure'. Actually, standard mapping for chip design is often 'product features' (the chip itself) or 'infrastructure'. Let's stick to the prompt's options. 'product features' fits best as they are building the IP for devices.

Required skills

full-chip and block-level implementation (floorplanning, placement, routing, timing closure, signoff), low-power design, physical verification (DRC/LVS), timing analysis and convergence (STA, signal integrity, reliability), EDA tool proficiency (Synopsys/Cadence: ICC2/Fusion Compiler/Innovus, PrimeTime/Tempus, StarRC), scripting and automation (Python, Tcl, Shell, Perl)

Preferred skills

advanced-node designs (≤5nm), DTCO methodologies, implementation scalability

Technologies

Synopsys ICC2/Fusion Compiler, Cadence Innovus, PrimeTime, Tempus, StarRC, Python, Tcl, Shell, Perl

Responsibilities

Shape full-chip and block-level implementation strategies; Contribute to implementation strategies for PPA targets; Advance methodology and flow innovation (automation, tool optimization); Enable cross-functional collaboration for flow adaptation; Mentor junior engineers and foster innovation culture

Seniority

Senior Staff, hands-on IC with mentorship

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