Analog Layout Design Engineer
Core
Design complex layouts of analog signal circuits and execute verification flows to ensure performance, reliability, and manufacturability.
Role type
Analog Layout Design Engineer
Builds
Analog IC blocks, floorplans, power grids, and ESD protection structures
Domain
Semiconductor / Analog IC Design
Required skills
Analog IC layout design, Custom layout tools (Cadence Virtuoso), Physical verification tools (Calibre), Advanced reliability verifications (EM/IR, ESD), Semiconductor process nodes knowledge
Preferred skills
Micro-floorplanning, Signal planning, Device matching, Guard rings, Common-centroid layout
Technologies
Cadence Virtuoso, Calibre
Responsibilities
Design complex layouts of analog signal circuits meeting strict design specifications, Design and analyze floorplans, power grids, ESD protection structures, and bumps, Run complete sets of design verification tools to check process design rules (DRC/LVS), Perform critical reliability checks including electromigration, voltage drop, and ESD, Develop and drive new analog layout methodologies, Partner with analog circuit designers and process technology teams
Seniority
Mid-Senior, hands-on IC
