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Senior Package Reliability Engineer

San Jose, California, United States💼 Full-time💰 $166,900–$166,900🗓 2026-07-16 → 2026-07-31

Core

Characterizing and qualifying advanced 2.5D/3D semiconductor packages through thermal and thermomechanical analysis to ensure reliability for FPGA solutions.

Role type

Senior IC semiconductor package reliability engineer

Builds

Advanced semiconductor packages for AI, cloud, networking, and edge markets

Domain

Semiconductor industry, advanced packaging, thermomechanics

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

thermal and thermomechanical analysis, finite element modeling (FEM), reliability statistics, failure analysis, lifetime prediction modeling, Python scripting, DFMEA development

Preferred skills

understanding of 2.5D/3D flip-chip packages, correlating simulations with dynamic warpage, developing customer-facing risk assessment collaterals

Technologies

Ansys, Abaqus, COMSOL

Responsibilities

Partner with development teams on packaging material selection; develop and maintain thermal/thermomechanical FEM models; execute reliability data collection strategies; lead reliability evaluations per JEDEC/MIL-STD/IPC/AEC standards; perform lifetime prediction modeling; develop DFMEA documents

Seniority

Senior, hands-on IC

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