Package and Chip thermal/stress simulation engineer
Core
Performing thermal and stress simulation analysis for IC packages, boards, and system-level designs to ensure reliability under various conditions.
Role type
IC and package thermal/stress simulation engineer
Builds
Thermal models, stress models, and co-simulation results for chip-package-PCB assemblies
Domain
Semiconductor packaging and thermal management
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
structure stress analysis, warpage prediction, material study, board level stress modeling, IC thermal analysis, package thermal analysis, thermal co-simulation, system level thermal simulation, system level stress simulation
Responsibilities
Conduct package related structure stress analysis including warpage and material study; Perform package and board level stress modeling for TCT, drop, and vibration; Execute IC and package thermal analysis, modeling, and characterization; Perform chip-package-PCB thermal co-simulation and design; Conduct system level thermal simulation; Perform system level stress simulation
