Senior Semiconductor Reliability Engineer – Advanced Silicon & Packaging
Core
Lead reliability strategy and execution for advanced AI silicon nodes and packaging technologies, ensuring robust product reliability from design enablement through high-volume manufacturing.
Role type
Senior IC semiconductor reliability engineer (silicon & packaging)
Builds
Advanced AI compute platforms (silicon and package technologies)
Domain
Semiconductor manufacturing / AI hardware
Deliverable
production ML models
Required skills
Reliability risk assessment, failure analysis (root cause), qualification planning, device physics modeling, JEDEC standards, cross-functional technical leadership
Preferred skills
Leading-edge node experience, AI accelerators/SoCs, HBM/chiplets/TSV/2.5D-3D integration, wafer-level/system-level stress testing, foundry/OSAT partnership management
Technologies
HTOL, thermal cycling, thermal shock, reflow testing, X-ray, CSAM, EM, TDDB, BTI, HCI, BEOL, interconnect, micro-bumps
Responsibilities
Define reliability requirements for silicon nodes and package platforms; Perform pre-silicon reliability risk assessments; Evaluate reliability mechanisms (EM, TDDB, BTI, HCI, BEOL); Support design reviews and reliability sign-off; Develop and execute qualification plans aligned with JEDEC; Lead HTOL, thermal cycling, thermal shock, and reflow qualification testing; Drive correlation between pre-silicon modeling and post-silicon results; Lead root-cause analysis of silicon and package failures; Utilize X-ray and CSAM for package defect diagnosis; Author qualification reports and risk assessments; Mentor engineers on reliability best practices.
