CareerPlan

Signal Integrity Engineer

USA-CA San Jose Innovation DriveFull-time$144k2026-10-07 → 2026-11-10

Core

Develop next-generation ASIC products focusing on parallel interfaces, 2.5D, and 3D interconnects, including MCM and IP development.

Role type

Senior IC Signal Integrity Engineer

Builds

Advanced ASIC products and interconnect technologies for AI/ML, cloud computing, and networking

Domain

Semiconductor / IC Design / Signal Integrity

Required skills

Signal Integrity (SI) and Power Integrity (PI) sign-off, Electromagnetic extraction and modeling, AC and transient analysis, Pre-layout modeling, EDA tool automation (TCL, Python), DDR/LPDDR/HBM tool suites, IC/Package/PCB database management

Preferred skills

Experience with 2.5D and 3D interconnects, Customer-facing technical support, Presentation and report generation

Technologies

SPICE, EDA tools, TCL, Python, DDR/LPDDR, HBM, 2.5D, 3D, MCM

Responsibilities

Perform mask-based timing signoff using time domain simulations, Conduct electromagnetic extraction and modeling of signal/power channels, Analyze Power Distribution Networks (PDN) and IO channels, Automate sign-off processes and improve EDA tool accuracy, Generate analysis results and support pre-sales activities

Seniority

Senior, hands-on IC