Senior Digital / Mixed-Signal IC Design or Verification Engineer
Core
Develop advanced semiconductor devices (digital IC design or mixed-signal verification) for low-power, high-performance analog and mixed-signal products supporting high-capacity data center enterprise storage.
Role type
Senior IC Design or Verification Engineer (Methodology Leader)
Builds
Next-generation preamplifier products and mixed-signal ASICs for data center storage
Domain
Semiconductor / Mixed-Signal ASIC / Data Center Storage
Deliverable
production ML models | product features
Required skills
Verilog/VHDL RTL coding, UVM/OVM verification frameworks, SystemVerilog Assertions (SVA), ASIC EDA tools (synthesis, STA, formal verification, place & route), Python/Perl/TCL scripting, transistor-level high-speed digital design, logic synthesis, static timing analysis
Preferred skills
Silicon process technologies (CMOS and Bipolar), device physics, AI-assisted verification workflows
Responsibilities
Define system requirements and block partitions for digital control functions; Architect and maintain advanced UVM-based testbenches for functional verification; Conduct detailed design reviews with internal and external customers; Provide technical support through testing, yield analysis, characterization, and qualification phases; Lead initiatives to integrate modern automation and AI-assisted workflows
Seniority
Senior, hands-on IC
