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Senior Digital Design Verification Engineer

Bengaluru, Karnataka, India💼 Full-time🗓 2026-09-22 → 2026-09-25

Core

Confirm accuracy of analog and mixed-signal electronic designs and integrated circuitry before pattern generation and mask development; execute simulations and tests to ensure adherence to design rules and specifications.

Role type

Senior IC design verification engineer (analog/mixed-signal)

Builds

Custom IC system solutions including display power products, charger power products, camera PMICs, power path devices, sensing devices, and high-performance communication interface products

Domain

Semiconductor / Analog and Mixed-Signal (AMS) IC design

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

SystemVerilog, UVM, RTL simulation, Gate-Level Simulation (GLS), Formal Property Verification (FPV), Clock Domain Crossing (CDC) assertions, Reset Domain Crossing (RDC) assertions, Unified Power Format (UPF), test plan creation, test case development, checker development, chip-top testbench development, regression execution, coverage tracking (Block, Expression, Toggle, FSM), protocol implementation (I2C, ASI, SPI, UART), technical debugging, post-silicon support, ATE functional pattern generation, silicon characterization

Preferred skills

Python scripting, Perl scripting, Shell scripting, AI-driven verification techniques, AMS verification environments, technical leadership, time management

Technologies

Cadence Xcelium, vManager, JasperGold, SystemVerilog Assertions (SVA), UVM

Responsibilities

Drive verification strategy by creating detailed test plans, test cases, and checkers; Develop UVM environments from the ground up including agents, drivers, monitors, and scoreboards; Execute RTL and Gate-Level Simulations (GLS) and run regressions to ensure 100% closure; Resolve complex design and testbench issues using advanced debugging techniques; Collaborate with Product and Application Engineering to support ATE functional pattern generation and silicon characterization; Partner with Architecture, Design, and Firmware teams to ensure successful product execution

Seniority

Senior, hands-on IC

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