Design Verification Engineer - APS
Core
Confirm accuracy of analog and mixed signal electronic designs before pattern generation/mask development and analyze equipment to establish operating data.
Role type
Senior IC design verification engineer (analog/mixed-signal)
Builds
Verification strategies and scalable UVM-based testbenches
Domain
Semiconductor hardware design (analog/mixed-signal)
Required skills
UVM, Verilog, SystemVerilog, Python, EDA design tools, UNIX environment, formal verification methods, analog circuit analysis, power systems knowledge
Preferred skills
Code coverage closure, testbench review, methodology improvement, stakeholder relationship building, rapid system ramp-up
Technologies
UVM, Verilog, SystemVerilog, Python, EDA tools, UNIX
Responsibilities
Develop verification strategies, build scalable UVM-based testbenches, drive functional and code coverage to closure, participate in code and testbench reviews, mentor junior team members, review vendor capability to support product development
Seniority
Senior, hands-on IC
