Analog & RF IC Senior Layout Engineer
Core
Translate complex circuit schematics into DRC/LVS-clean physical layouts for critical IP blocks on advanced technology nodes.
Role type
Senior Analog & RF IC Layout Engineer
Builds
Custom top-level and IP blocks for high-tech hardware
Domain
Semiconductor design, Analog/RF circuits, Advanced FinFET nodes
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog and digital circuit layout, DRC/LVS sign-off, Floorplanning, Power/ground architecture, Device matching, FinFET node design, Cadence Virtuoso, Mentor Calibre
Preferred skills
High-speed custom circuit design (TX, RX, SerDes, PLLs), Schedule assessment, Top-level integration
Technologies
Cadence Virtuoso, Mentor Calibre, FinFET
Responsibilities
Translate circuit schematics into physical layouts, Partner with designers on floorplanning and power architecture, Master EDA tools for advanced nodes, Participate in schedule assessments and top-level integration
Seniority
Senior, hands-on IC
