DFT Engineer
Core
Design and implement Digital Design Test (DFT) solutions including MBIST, scan insertion, and ATPG to ensure silicon yield and debugability.
Role type
Senior DFT Engineer
Builds
DFT architectures and test patterns for integrated circuits
Domain
Semiconductor / Digital Logic Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
MBIST architecture and insertion, scan insertion and compression, ATPG and pattern development, RTL lint checking, silicon bring-up and yield analysis, digital logic fundamentals, Perl scripting, Mentor Tessent/Synopsys DFT tool suite
Preferred skills
STA constraint development in DFT modes
Responsibilities
Develop ATE patterns and manage hand-off processes, perform block and chip-level DFT implementation, execute DFT lint checking and simulation, collaborate with design and verification teams during DFT design phase, engage with ATE and product development teams during silicon bring-up
Seniority
Senior, hands-on IC
