IC Package Mechanical FEA Engineer (R&D)
Core
Mechanical FEA engineer developing high-performance package designs for complex ASICs used in AI, networking, HPC, and 5G base stations.
Role type
IC Package Mechanical FEA Engineer (R&D)
Builds
Unique multi-chip-module (MCM) packages, mainstream flip-chip BGA (FCBGA) packages, and emerging co-packaged fiber-optic transceivers.
Domain
Semiconductor packaging, mechanical engineering, high-performance computing
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
FEA modeling, mechanical design, numerical simulation analysis, mechanical testing and measurement, model calibration with empirical data, lab-scale test design, trade-off analysis (warpage, stress, reliability, thermal, electrical)
Preferred skills
Ansys Classic/Mechanical, 3DIC/hybrid copper bonding/heterogeneous integration knowledge
Responsibilities
Design mechanical aspects of ASIC packages, quantify and optimize reliability/manufacturing via FEA, validate models through measurement and experimentation, collaborate with designers/manufacturing partners, manage 4+ concurrent projects, document design rules
Seniority
Senior, hands-on IC